Solid-state imaging device formed from a CCD (Charge Coupled Device) and a CMOS image sensor have been previously widely used in video cameras, digital steel cameras, and the like. Noise reduction, as well as sensitively improvement, is an important issue common to these solid-state imaging devices.
In particular, a dark current, wherein electric charges (electrons) generated from fine defects present at a substrate interface of a light-receiving surface are taken in as signals so as to serve as a micro-current and be detected in spite of the fact that there is no incident light and, therefore, there is no pure signal charge generated through photoelectric conversion of the incident light or a dark current, a source of which is an interface state at an interface between a light-receiving portion and an upper layer film, is a noise to be reduced with respect to a solid-state imaging device.
As for a technique to suppress generation of a dark current resulting from the interface state, for example, a buried photodiode structure having a hole accumulation (hole accumulation) layer 23 formed from a P+ layer on a light-receiving portion (for example, photodiode) 12, as shown in FIG. 38 (2), is used. In this regard, in the present specification, the above-described buried photodiode structure is referred to as an HAD (Hole Accumulated Diode) structure. As shown in FIG. 38 (1), regarding a structure including no HAD structure, electrons which are generated on the basis of the interface state and which serve as a dark current flow into the photodiode. On the other hand, as shown in FIG. 38 (2), regarding the HAD structure, generation of electrons from the interface is suppressed by the hole accumulation layer 23 formed at the interface. Furthermore, even when electric charges (electrons) resulting from the interface are generated, the electric charges flow in the hole accumulation layer 23 of the P+ layer, in which many holes are present, and can be extinguished without flowing into a charge accumulation portion, which is a N+ layer in a light-receiving portion 12 and which serves as a potential well. Consequently, it can be prevented that the electric charges resulting from the interface serve as a dark current and are detected and, thereby, a dark current resulting from the interface state can be suppressed.
As for a method for producing this HAD structure, in general, an impurity, e.g., boron (B) or boron difluoride (BF2), which forms a P+ layer, is ion-implanted through a thermal oxide film or a CVD oxide film disposed on a substrate and, thereafter, the implanted impurity is activated through annealing so as to produce a P-type region in the vicinity of the interface. However, a heat treatment at a high temperature of 700° C. or higher is indispensable to activate the doping impurity and, therefore, it is difficult to form a hole accumulation layer through ion implantation by a low-temperature process at 400° C. or lower. Moreover, in the case where it is desired to avoid activation at high temperatures for a long period in order to suppress diffusion of dopants, a method for forming a hole accumulation layer, wherein ion implantation and annealing are conducted, is not preferable.
In addition, if silicon oxide or silicon nitride disposed as an upper layer of the light-receiving portion is formed by a technique of low-temperature plasma CVD or the like, the interface state deteriorates as compared with the interface between a film formed at high temperatures and a light-receiving surface. This deterioration in interface state causes an increase in dark current.
As described above, in the case where it is desirable to avoid the ion implantation and the annealing treatment at high temperatures, it is not possible to form the hole accumulation layer through ion implantation in the related art, and the dark current tends to further deteriorate. In order to solve it, the need for forming the hole accumulation layer by another technique not employing ion implantation in the related art arises.
For example, a technology has been disclosed, wherein charged particles having the same polarity as the conduction type opposite to the conduction type of a semiconductor region are embedded into an insulating film, which is formed from silicon oxide, on a photoelectric conversion element, which is disposed in a semiconductor region and which has the opposite conduction type, so as to increase the potential of a surface of the photoelectric conversion portion, and an inversion layer is formed on the surface so as to prevent depletion in the surface and reduce generation of the dark current (refer to, for example, Japanese Unexamined Patent Application Publication No. 1-256168). In the above-described technology, a technology to embed charged particles into the insulating layer is needed. However, it is not clear what embedding technology is employed. Furthermore, electrodes are needed for charge injection in order to inject the electric charge from the outside into the insulating layer, as is employed in non-volatile memory in general. Even if the electric charge can be injected from the outside in a non-contact manner without employing an electrode, it is necessary that the electric charge trapped in the insulating film is not detrapped, so that a charge retention characteristic becomes a problem in any event. For that purpose, an insulating film having a high charge retention characteristic and high quality has been demanded, but realization has been difficult.
A problem to be solved is that in the case where formation of an adequate hole accumulation layer through high concentration ion implantation into a light-receiving portion (photoelectric conversion portion) is intended, since the light-receiving portion is damaged because of the ion implantation, an annealing treatment at high temperatures is indispensable and, at that time, diffusion of impurities occurs and the photoelectric conversion characteristic deteriorates. On the other hand, in the case where the ion implantation is conducted at a low concentration in order to reduce the damage due to the ion implantation, a problem is that the concentration of the hole accumulation layer is reduced and a function as a hole accumulation layer is not adequately provided. That is, the problem is that it is difficult to allow realization of an adequate hole accumulation layer and reduction in dark current to become mutually compatible while diffusion of impurities is suppressed and a desired photoelectric conversion characteristic is provided.
It is an object of the present invention to allow realization of an adequate hole accumulation layer and reduction in dark current to become mutually compatible.